P. Gadfort and O. A. Ayorinde, “Field Programmable Neural Array - Artificial Intelligence at the Edge”. DTIC Journal of DoD Research and Engineering, Vol 2, Issue 2, 2019 [journal]
P. Gadfort, O. A. Ayorinde, M. Bezandry, and M. Yu, “Field Programmable Neural Array - Artificial Intelligence at the Edge”. 2019 Government Microcircuit Applications and Critical Technology Conference (GOMACTech), Albuquerque, NM, March 26 - 28, 2019 [talk]
C. J. Poirier, P. Gadfort, A. M. R. Dixon, M. W. Nonte, J. K. Conroy, and W. D. Hairston, “Hardware implementation of an adaptive data acquisition system for real-world EEG”. 2018 40th Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC), Honolulu, HI, July 17 - 21, 2018 [talk]
W. Zhao, P. Gadfort, K. Bhanushali, and P. D. Franzon, “RF-only Logic: an Area Efficient Logic Family for RF-Power Harvesting Applications”. Circuits and Systems - I, IEEE Transactions on, Vol. 65, Issue 1, 2018 [journal]
M. Nonte, J. Conroy, P. Gadfort, W. D. Hairston, “Online Adaptive Data Acquisition Enabling Ultra-Low Power Real-World EEG”. 2017 IEEE International Circuits and Systems Symposium (ISCAS), Baltimore, MD, May 29 - 31, 2017 [talk]
M. J. Gadlage, J. R. Ahlbin, P. Gadfort, A. H. Roach, and S. Stansberry, “Characterization of Single-Event Transients in Schmitt Trigger Inverter Chains Operating at Subthreshold Voltages”. Nuclear Science, IEEE Transactions on, Vol. 64, Issue 1, 2017 [journal]
P. Gadfort and R. Karmarkar, “Battery-Less Electroencephalogram System Architecture Optimization”. Dec. 2016 [ARL-TR-7909]
M. J. Gadlage, J. R. Albhin, P. Gadfort, S. Stansberry, A. H. Roach, A. Duncan, and M. Kay, “Alpha-Particle and Neutron-Induced Single-Event Transient Measurements in Subthreshold Circuits”. 2016 IEEE International Reliability Physics Symposium (IRPS), Pasadena, CA, Apr. 17 - 21, 2016 [poster]
P. D. Franzon, P. Gadfort, and W. S. Pitts, “Millimeter scale three-dimensional antenna structures and methods for fabricating same”. Feb. 2, 2016 US Patent [US9252501]
P. Gadfort, A. Dasu, and A. Akoglu, “Mapping 1D-FF on an Energy Efficient 3D FPGA-DRAM Architecture”. Fourth Berkeley Symposium on Energy Efficient Electronic Systems (E3S), Berkeley, CA, Oct. 1 - 2, 2015 [poster]
P. Gadfort, “An Ultra-Low-Power Low-Noise Amplifier in 45nm SOI CMOS for Portable EEG Applications”. Fourth Berkeley Symposium on Energy Efficient Electronic Systems (E3S), Berkeley, CA, Oct. 1 - 2, 2015 [poster]
J. R. Ahlbin, M. J. Gadlage, P. Gadfort, and S. Stansberry, “Response of Sub-Threshold Circuits to Single-Event Effects”. 2015 Nuclear and Space Radiation Effects Conference (NSREC), Boston MA, July 13 - 17, 2015
P. D. Franzon, P. Gadfort, and J. C. Ledford, “AC Powered Logic Circuits and Systems Including Same”. July 7, 2015 US Patent [US9077245]
A. Dasu, M. Fritze, P. Gadfort, and A. Akoglu, “Energy Efficient 3D System In Stack For DoD Applications: Accelerators, FPGA, And DRAM”. 2015 40th Government Microcircuit Applications & Critical Technology Conference (GOMACTech), St. Louis, MO, Mar 24 - 26, 2015 [talk]
P. Gadfort and P. D. Franzon, “Millimeter-Scale True 3-D Antenna-in-Package Structures for Near-Field Power Transfer”. Components, Packaging and Manufacturing Technology, IEEE Transactions on, Vol. 4, Issue 10, 2014 [journal]
J. R. Ahlbin and P. Gadfort, “Impact of Ultra-Low Voltages on Single-Event Transients and Pulse Quenching”. 2014 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), Millbrae, CA, Oct. 6 - 9, 2014 [talk]
P. Gadfort, A. Dasu, A. Akoglu, Y. Leow, and M. Fritze, “A Power Efficient Reconfigurable System-in-Stack: 3D Integration of Accelerators, FPGAs, and DRAM”. 2014 IEEE 27th System-on-Chip Conference (SOCC), Las Vegas, NV, Sept. 2 - 5, 2014 [talk]
M. Jagasivamani, P. Gadfort, M. Sika, M. Bajura, and M. Fritze, “Split Fabrication Obfuscation: Metrics and Techniques”. 2014 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST), Arlington, VA, May 6 - 7, 2014 [talk]
M. Bajura, J. R. Ahlbin, I. Sanchez-Esqueda, S. Stansberry, P. Gadfort, A. Ramkumar, K. Sutaria, K. Cao, T. Wu, C. Ho, M. Chen, H. Nye, G. Larosa, and B. Griffin, “Assessing Long-Term CMOS Reliability For Government IC Applications”. 2014 39th Government Microcircuit Applications & Critical Technology Conference (GOMACTech), Charleston, SC, Mar. 31 - Apr. 3, 2014 [talk]
P. Gadfort, “Packaging and Integration of Three Dimensional Microsensors”. Doctor of Philosophy, defended December 16, 2013 [etd]
W. Zhao, P. Gadfort, E. Erickson, and P. D. Franzon, “A compact inductively coupled connector for mobile devices”. 2013 IEEE 63rd Electronic Components and Technology Conference (ECTC), Las Vegas, NV, May 28 - 31, 2013 [poster]
P. Gadfort and P. D. Franzon, “Fabrication and Measurement of Miniature 3-Dimensional Antenna”. MuSyC/GSRC Joint Review 2012, Clark Kerr Campus, Oct. 15, 2012
P. Gadfort and P. D. Franzon, “Near threshold RF-only analog to digital converter”. 2012 IEEE Subthreshold Microelectronics Conference (SubVT), Waltham, MA, Oct. 9 - 10, 2012 [talk]
J. C. Ledford, P. Gadfort, and P. D. Franzon, “An analysis of subthreshold SRAM bitcells for operation in low power RF-only technologies”. 2012 IEEE Subthreshold Microelectronics Conference (SubVT), Waltham, MA, Oct. 9 - 10, 2012 [talk]
P. Gadfort and P. D. Franzon, “Design, modeling, and fabrication of mm3 three-dimensional integrated antennas”. 2012 IEEE 62nd Electronic Components and Technology Conference (ECTC), San Diego, CA, May 29 - June 1, 2012 [poster]
P. Gadfort and P. D. Franzon, “Fabrication of True 3D Integrated Antenna””. MuSyC/GSRC Joint Review, Clark Kerr Campus, Berkeley, CA, Nov. 16, 2011
P. Gadfort and P. D. Franzon, “RF-only Logic Circuits”. 2011 Subthreshold Microelectronics Conference, Lexington, MA, Sept. 26, 2011
P. Gadfort and P. D. Franzon, “Low-power Self-equalizing Driver for Silicon Carrier Interconnects with Low Bit Error Rate”. 18th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS), Portland, OR, Oct. 19 - 21, 2009 [talk]
P. Gadfort, “Low Power Interconnect Circuits using Silicon Carriers”. Master of Science Thesis, defended Apr. 24, 2009 [etd]